Archive for the ‘IC’ Category
Thursday, October 22nd, 2009
If EUV lithography is to succeed, infrastructure gaps will need to be addressed forthwith. The lack of inspection tools for EUV masks and substrates constitutes one such gap, now recognized as a priority by SEMATECH. At the OSA/APS Frontiers in Optics (FiO) meeting held in San Jose, October 11-15, Carmen Menoni of Colorado State University […]
EUV mask inspection advances
Tags: 22nm, 32nm, actinic, EUV, IC, inspection, litho, mask
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Friday, October 9th, 2009
Founded in 1984 with Flemish government support, IMEC has reached 25 years. To celebrate the organization’s accomplishments, BetaSights joined other industry media outlets attending a research review event in beautiful Leuven, Belgium. From 1999 to 2009 has been the “phase of international breakthrough” as described by current president Luc Van den hove. Working with OEMs […]
IMEC betas for TSMC HVM
Tags: 193nm, 22nm, 300mm, 32nm, beta, EUV, finFET, Flash, HB-LED, IC, logic, MEMS, PV, SiGe, TANOS
Posted in Equipment, fab, IC, Material, MEMS, Product, PV, Service | Comments Off on IMEC betas for TSMC HVM
Sunday, October 4th, 2009
KLA-Tencor recently announced its long awaited 193nm reticle defect inspection tool, the Teron 600. Wafer scanners adopted 193nm exposure wavelength years ago in order to shrink circuit features below the resolution limit set by the previous (248nm) wavelength, roughly 130nm. The photomasks used in those tools, however, continued to be inspected at 257nm, in spite […]
New 193nm mask inspection tool
Tags: 193nm, 22nm, 32nm, EUV, IC, inspection, litho, mask, reticle, SMO
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Friday, September 18th, 2009
At SEMICON West this year, ASML announced tools that fleshed out their Holistic Lithography scheme introduced at SPIE’s Advanced Lithography Symposium in February of this year. The key idea of Holistic Lithography, according to Bert Koek, senior vice president of the applications products group at ASML, is integrating computational lithography, wafer printing, and process control […]
Lithography going holistic
Tags: 22nm, 32nm, computational, i193, IC, litho, OPC, SMO
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Wednesday, August 26th, 2009
IMEC/F-IZM/SUSS/TM vs. SEMATECH/Leti/EVG/Brewer. The leading R&D consortia have aligned (pun intended) with leading equipment and materials suppliers to create ultra-thin silicon wafer handling technologies for 3D ICs. With the ability to shrink circuit dimensions in 2D becoming ever more difficult, most of the world’s IC fab leaders are evaluating the use of the 3rd dimension. […]
Dualing 3DIC consortia
Tags: 3D, IC, inspection, interconnect, MEMS, metal, process, R&D, thinning, TSV
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Friday, August 21st, 2009
James Quinn, CEO of Replisaurus, has been very busy executing for the last few years to bring his vision of a new metallization technology to the IC fab industry. Targeting the formation of Cu interconnects for advanced packaging applications, Quinn has assembled a great team to work with CEA-Leti and other industrial partners on a […]
Replisaurus ready to roll with Leti
Tags: Cu, deposition, ECD, IC, interconnect, Leti, MEMS, metal, packaging
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Monday, August 17th, 2009
Luminescent Technologies, Inc., a computational lithography company, has broadened its reach by announcing the industry’s first offline computational photomask inspection product (unofficially named LAIPH for Luminescent Automated Image Processing Hub). A “premier company in Asia” is the first customer to qualify the new computational defect review product in volume production. According to a Luminescent representative, […]
Luminescent Inspection or LAIPH
Tags: 22nm, 32nm, 45nm, aerial, defect, IC, inspection, litho, mask
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Wednesday, August 12th, 2009
At the SEMICON West 2009 Device Scaling TechXPOT, moderated by this editor, SEMATECH’s Ray Jammy reviewed the latest results in scaling CMOS transistors. “We are litererally running out of atoms,” explained Jammy. “You can see the number of atoms in a gate dielectric.” When you have such thin layers, how do you control device parameters? […]
IC HK gate scaling limits
Tags: 22nm, 32nm, 45nm, ALD, dipole, fab, gate, HfO2, high-k, HKMG, IC, junction, R&D, RTP
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Tuesday, August 4th, 2009
While EUV Lithography may now be inevitable, according to SEMATECH Program Manager Bryan Rice, it may not be indispensable. SEMICON West offered a snapshot of progress towards the 32nm, 22nm, and 16nm device nodes at the Device Scaling TechXPOT, and the industry appears to have patterning options even if EUV encounters further delay. Yan Borodovsky […]
PS –We don’t need EUV!
Tags: 11nm, 16nm, 193i, 22nm, 7nm, EbDW, EUV, IC, ITRS, litho, NIL
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Wednesday, July 22nd, 2009
At SEMICON West and Intersolar North America last week in San Francisco, crossing guards danced to keep the throngs away from the vehicles at the corner of 4th and Howard, as many people flowed back and forth between the shows co-located across 4th Street from each other. SEMICON West, down ~30% in size from last […]
Intersolar and SEMICON in SF show fab tech marches on
Tags: 22nm, 32nm, IC, Material, OEM, PV, SEMI, Semiconductor
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