Nanometrics today announced the release of Version 2.0 of its NanoCD Suite of solutions for optical critical dimension (OCD) metrology, just one year after V1 was released. OCD (a.k.a., “scatterometry”) has been used to successfully control fab processes for many years. The major known limitation of the technique is model building from reference metrology data, […]
Bob Metcalfe is very smart, very successful, and very rich. Now an unashamed venture capitalist investing in both PV and home nuclear as part of his diversified portfolio, his major vision is for a new “enernet” that would fundamentally revolutionize the energy industry. He spoke of this as well as his invention of Ethernet this […]
SVTC Technologies has been busy announcing new business directions ever since Joe Bronson stepped in as CEO at the beginning of this year. Last month it announced a partnership with Entrepix to provide 300 mm chemical mechanical polishing (CMP) development and production services for customers who use the Tool Access Program (TAP) at the SVTC […]
Amkor Technology announced today that it will introduce its next generation package on package (PoP) platform at the IMAPS Device Packaging Conference next week in Scottsdale, AZ. Again begging the question, “Who needs TSV?” this this new PoP platform uses Amkor’s proprietary through mold via (TMV)(TM) interconnect technology to get to 3D IC stacking. {Blog […]
Electron beam direct write (EBDW) lithography is well-developed and has better potential resolution than any other method, but writing speeds did not keep up with Moore’s law after about 1980, leading to abysmal throughput (measured in hours per wafer). Now, the e-Beam Initiative focusing on design for e-beam manufacturing (DFEB) and multibeam writing using MEMS […]
IEDM 2008 included the unveiling of Schiltron’s (Session 34.6) revolutionary 3-D high density Flash technology that combines the smallest TFTs to date in series strings of up to 64 cells. The unique architecture effectively removes pass disturbs allowing large worst-case string currents and resulting in thinner tunnel oxides, lower erase voltages, and higher endurance than […]
Partners SII NanoTechnology and Carl Zeiss NTS have joined with ASML R&D and Toshiba’s process and manufacturing engineering groups to show a new way to create accurate cross-sections of soft photoresist and low-k dielectric lines in dense circuit patterns. First shown in a poster paper at SPIE last week was the ability to generate accurate […]
One year after this editor covered an SPIE panel on reference metrology and summarized the situation as “there is no more noise; there is only signal,” another lively panel at SPIE this evening discussed the need for not just precise but accurate critical dimension (CD) measurements in advanced IC lines. With smaller structures and reduced […]
Applied Materials’ Technical Symposium at SPIE 2009 featured a panel discussion on next generation lithography (NGL) that was moderated by the company’s Ken MacWIlliams. The outstanding panelists were C. Grant Willson (UT-Austin), Burn Lin (TSMC), Jongwook Kye (AMD), Steve Radigan (Sandisk), and Milind Weling (Cadence). As would be expected from this panel, EUV steppers were […]
At the Nikon Lithovisions 2009 Symposium on February 22 this year in San Jose, California, Masato Hamatani described the features and beta test results for the NSR-S620 scanning immersion exposure tool, optimized for double patterning lithography. While the tool boasts only one wafer stage, its “Streamlign Platform” concept shoots 200 wafers per hour with 2nm […]