Thursday, March 19th, 2009
Mentor Graphics has announced new capabilities to the Calibre(R) platform to allow designers to control thickness variability due to Chemical Mechanical Planarization (CMP) at advanced process nodes. Designers can transition from dummy fill to density-based fill, or to full model-based fill, depending on the demands of their designs and target manufacturing process. The new capability comes from combining the company’s Calibre litho modeling with the CMP sensitivity modeling acquired with Ponte Solutions last year.
Allowable thickness variation post-CMP remains +-10nm so the percent variation increases for each node; model-based fill techniques minimize such variations (source: ITRS)
Variations in thickness created by chemical-mechanical processing (CMP) can lead to manufacturing and parametric performance issues. Metal “fill” attempts to achieve an even distribution across the die by adding non-functional metal shapes to “white space” regions in a design. However, adding too much fill can increase parasitic capacitance. We need fill in the right places to optimize performance while minimizing manufacturing variations. Because the percentage of total thickness variability per layer has increased at each node (see figure), CMP variations are much more significant below 65nm, and traditional dummy fill approaches are no longer adequate.
Both AMD and CSR have already used SmartFill; CSR was able to successfully tape-out a RFCMOS 65nm design and get first-time-right working chips from TSMC. Achieving even greater accuracy requires detailed simulation of the CMP process, and so Calibre now provides its own CMP simulator with models for leading fabs validated against silicon. Because the rapidly changing CMP process often requires model updates, it allows users to create and calibrate their own thickness models, a capability that is unique in the industry. “Today Mentor Graphics is announcing the availability of a CMP model specifically calibrated to Chartered Semiconductor’s 45nm process,” stated Walter Ng, Vice President of Design Enablement Alliances at Chartered Semiconductor Manufacturing.
“We already have 10 to 20 companies working with us on SmartFill,” said Michael Buehler-Garcia, director of Calibre Design Solutions Marketing, formerly of Ponte Solutions (and formerly of PDF Solutions where this editor reported to him). More about DFM and CMP, from exclusive interviews with Buehler-Garcia and CMP guru Michael Fury will be in the next BetaSights Newsletter. –E.K.
Tags: 45nm, 65nm, CMP, EDA, fill, IC, metal, model, variation