Posts Tagged ‘Si’
Thursday, March 26th, 2009
German and French teams are combining EUR 14.5m investment into development of strained-silicon on insulator (sSOI) technology under the DEvice and CIrcuit performance boosted through SIlicon material Fabrication (DECISIF) program. The work will combine original research results from Research Center Juelich and Leti/Soitec to try to lower costs and defect-densities in the creation of 300mm […]
DECISIF start on strained silicon
Tags: 22nm, 32nm, 45nm, CVD, EDA, epi, IC, implant, integration, Material, Si, SiGe, SOI, sSOI, strain, wafer
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Thursday, March 12th, 2009
Stangl Semiconductor Equipment has launched its Linea horizontal inline wet process platform for cleaning and etching of crystalline silicon PV wafers. The fully-automated dry-in/dry-out system offers reliable production capacity of up to 3,400 wafers per hour (wph) corresponding to an estimated 60 MW per line running 156mm wafers. The system can also be configured at […]
Stangl inline PV wet tool
Tags: chemical, clean, etch, inline, PV, Si, wet
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Thursday, February 12th, 2009
CaliSolar is ramping production of upgraded metallurgical-grade silicon (UMG-Si) solar cells and has selected Eyelit’s manufacturing software suite to support its new fab next to its headquarters in Sunnyvale, California. CaliSolar is a private company claiming 15% conversion efficiency from cell made using 100% UMG-Si feedstock that undergoes purification at both the ingot and wafer […]
CaliSolar UMG-Si PV cells ramping
Tags: anneal, efficiency, etch, getter, MES, patent, PV, Si, UMG
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Friday, February 6th, 2009
The SEMI PV Group today announced the release of its Global Photovoltaic (PV) Standards Roadmap Guidance Document, which identifies immediate opportunities for reducing cost and accelerating innovation in thin-film and crystalline silicon cell and module manufacturing through industry standards. This new roadmap confirms that major manufacturing cost savings are possible through standardizing wafer carriers and […]
SEMI PV standards roadmapped
Tags: cost, fab, management, PV, Si, solar, standards, thin-film
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Wednesday, February 4th, 2009
Allvia, the first through-silicon via (TSV) foundry, has secured $5 million from private investors in a round of funding to expand manufacturing facilities and to build more capacity. After 3 years of revenue generation from providing vertical interconnects and System-in-Package (SiP) solutions, total investment in the company is now $25 million. With in-house processing equipment, […]
Allvia TSV foundry adding capacity
Tags: 3D, foundry, IC, interconnect, MEMS, package, RF, Service, Si, TSV
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Friday, January 30th, 2009
Ziptronix wants to help you with your 3D roadmap. The IP spin-out from Research Triangle Park, NC is now actively negotiating licenses to its unique wafer-to-wafer (W2W) and die-to-wafer (D2W) bonding technologies. Using treated-oxide (with surface treatments) and nickel (with a mystery metal) as the connecting materials, room temperature bonding with up to 108/cm2 of […]
Ziptronix floats IP licenses for 3D IC bonding
Tags: 3D, bonding, IC, InP, integration, IP, Ni, oxide, Si, TSV
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Thursday, January 29th, 2009
Aixtron and Ovonyx announced a JDP for Atomic Vapor Deposition (AVD®) process technology to push scaling of next-generation phase change memory (PCM) products. Since it is expected to replace current high-density memory, PCM cells must be made dense and so companies like Samsung (Ref: BetaSights Newsletter 0001) and Numonyx require CVD-like processes for gap-fill instead […]
Aixtron and Ovonyx partner for PCM deposition
Tags: ALD, chamber, CVD, memory, PCM, precursor, PVD, Si, vapor
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Wednesday, January 28th, 2009
Silicon Clocks, the developer of custom semiconductor timing solutions that has reinvented itself as a “custom product development house” with a new CEO, has announced a new product based on its CMOS-MEMS (CMEMS) embedded approach. CMEMS-ZeroThermal passive temperature compensation resonators exhibit comparable temperature stability to quartz crystals, while drastically simplifying oscillator design, and reportedly reducing […]
Silicon Clocks embeds MEMS on CMOS
Tags: clock, CMOS, crystal, integration, IP, MEMS, resonator, Si, SiGe
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